Please use this identifier to cite or link to this item:
https://hdl.handle.net/11681/34161
Title: | Initial benchmarking of the Intel 3D-stacked MCDRAM |
Authors: | Parsons, Benjamin S. |
Keywords: | MCDRAM High Bandwidth Memory (HBM) Knights Landing (KNL) Benchmarking |
Publisher: | Information Technology Laboratory (U.S.) Engineer Research and Development Center (U.S.) |
Series/Report no.: | Technical Report (Engineer Research and Development Center (U.S.)) ; no. ERDC/ITL TR-19-8 |
Abstract: | Modern, manycore processors are increasingly using high-bandwidth memory (HBM) to provide the necessary memory bandwidth to high core counts. The Knights Landing processor is one example, which is paired with a three-dimensional (3D) stacked memory, and a multi-channel direct random access memory (MCDRAM). The MCDRAM offers high-bandwidth memory, however, it is also important to understand the latency of the memory and how the memory will respond to noncontiguous accesses. This work provides information to programmers about how their applications will perform, and which of the many memory settings that will provide the best performance. These settings are non-trivial and can have a large impact on application performance. In addition to several micro-benchmarks, this work shows that using the MCDRAM can provide speedups up to 3.7x for a congregant gradient application, while giving slowdowns of 3x for certain hash table implementations. Given this range of performance, it is essential for programmers to understand this memory technology and how to use it appropriately. |
Description: | Technical Report |
Gov't Doc #: | ERDC/ITL TR-19-8 |
Rights: | Approved for Public Release; Distribution is Unlimited |
URI: | https://hdl.handle.net/11681/34161 http://dx.doi.org/10.21079/11681/34161 |
Size: | 33 pages / 2.030 Mb |
Types of Materials: | |
Appears in Collections: | Technical Report |
Files in This Item:
File | Description | Size | Format | |
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ERDC-ITL TR-19-8.pdf | 2.08 MB | Adobe PDF | ![]() View/Open |